/*
 * alu.v
 *
 * Copyright 2024 dh33ex <dh33ex@riseup.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA or visit <http://www.gnu.org/licenses/>.
 *
 *
 */

module alu (
    input      [31:0]  i_A,
    input      [31:0]  i_B,
    input      [3:0]   i_ALU_sel,

    output reg [3:0]   o_NZVC,
    output reg [31:0]  o_ALU_result
);

    always @* begin
        case(i_ALU_sel)
            4'd1 : begin                            /* bit AND */
                o_ALU_result = i_A & i_B;           /* result */
                o_NZVC[3] = o_ALU_result[31];       /* negative flag */
                if (o_ALU_result == 0)              /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                    /* two's comp overflow flag */
                o_NZVC[1:0] = 0;
            end

            4'd2 : begin                            /* bit OR */
                o_ALU_result = i_A | i_B;           /* result */
                o_NZVC[3] = o_ALU_result[31];       /* negative flag */
                if (o_ALU_result == 0)              /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                    /* two's comp overflow flag and carry flag */
                o_NZVC[1:0] = 0;
            end

            4'd3 : begin                            /* bit XOR */
                o_ALU_result = i_A ^ i_B;           /* result */
                o_NZVC[3] = o_ALU_result[31];       /* negative flag */
                if (o_ALU_result == 0)              /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                    /* two's comp overflow flag and carry flag */
                o_NZVC[1:0] = 0;
            end

            4'd4 : begin                            /* bit NOT */
                o_ALU_result = ~i_A;                /* result */
                o_NZVC[3] = o_ALU_result[31];       /* negative flag */
                if (o_ALU_result == 0)              /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                    /* two's comp overflow flag and carry flag */
                o_NZVC[1:0] = 0;
            end

            4'd5 : begin                                /* addition */
                {o_NZVC[0], o_ALU_result} = i_A + i_B;  /* sum and carry flag */
                o_NZVC[3] = o_ALU_result[31];           /* negative flag */
                if (o_ALU_result == 0)                  /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                        /* two's comp overflow flag */
                if (((i_A[31] == 0) && (i_B[31] == 0) && (o_ALU_result[31] == 1)) ||
                    ((i_A[31] == 1) && (i_B[31] == 1) && (o_ALU_result[31] == 0)))
                    o_NZVC[1] = 1;
                else
                    o_NZVC[1] = 0;
            end

            4'd6 : begin                                /* subtraction */
                {o_NZVC[0], o_ALU_result} = i_A - i_B;  /* sub and borrow flag */
                o_NZVC[3] = o_ALU_result[31];           /* negative flag */
                if (o_ALU_result == 0)                  /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                        /* two's comp overflow flag */
                if (((i_A[31] == 0) && (i_B[31] == 0) && (o_ALU_result[31] == 1)) ||
                    ((i_A[31] == 1) && (i_B[31] == 1) && (o_ALU_result[31] == 0)))
                    o_NZVC[1] = 1;
                else
                    o_NZVC[1] = 0;
            end

            4'd7 : begin                                /* multiplication */
                {o_NZVC[0], o_ALU_result} = i_A * i_B;  /* mul and borrow flag */
                o_NZVC[3] = o_ALU_result[31];           /* negative flag */
                if (o_ALU_result == 0)                  /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                        /* two's comp overflow flag */
                if (((i_A[31] == 0) && (i_B[31] == 0) && (o_ALU_result[31] == 1)) ||
                    ((i_A[31] == 1) && (i_B[31] == 1) && (o_ALU_result[31] == 0)))
                    o_NZVC[1] = 1;
                else
                    o_NZVC[1] = 0;
            end

            4'd8 : begin                                /* division */
                {o_NZVC[0], o_ALU_result} = i_A / i_B;  /* div and borrow flag */
                o_NZVC[3] = o_ALU_result[31];           /* negative flag */
                if (o_ALU_result == 0)                  /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                        /* two's comp overflow flag */
                if (((i_A[31] == 0) && (i_B[31] == 0) && (o_ALU_result[31] == 1)) ||
                    ((i_A[31] == 1) && (i_B[31] == 1) && (o_ALU_result[31] == 0)))
                    o_NZVC[1] = 1;
                else
                    o_NZVC[1] = 0;
            end

            4'd9 : begin                            /* bit LSL */
                o_ALU_result = i_A << i_B;          /* result */
                o_NZVC[3] = o_ALU_result[31];       /* negative flag */
                if (o_ALU_result == 0)              /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                    /* two's comp overflow flag and carry flag */
                o_NZVC[1:0] = 0;
            end

            4'd10 : begin                           /* bit ASR */
                o_ALU_result = i_A >>> i_B;         /* result */
                o_NZVC[3] = o_ALU_result[31];       /* negative flag */
                if (o_ALU_result == 0)              /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                    /* two's comp overflow flag and carry flag */
                o_NZVC[1:0] = 0;
            end

            4'd11 : begin                           /* bit ROR */
                o_ALU_result = (i_A << i_B) | (i_A >> (32 - i_B)); /* result */
                o_NZVC[3] = o_ALU_result[31];       /* negative flag */
                if (o_ALU_result == 0)              /* zero flag */
                    o_NZVC[2] = 1;
                else
                    o_NZVC[2] = 0;

                                                    /* two's comp overflow flag and carry flag */
                o_NZVC[1:0] = 0;
            end

            default: begin
                o_ALU_result = 32'hxxxxxxxx;
                o_NZVC   = 4'hx;
            end
        endcase
    end

endmodule
